Researchers harness chaos theory for new class of CPUs

Researchers harness chaos theory for new class of CPUsIn general, processors that are dedicated to a single task are faster and more efficient than a general purpose processor like the ones Intel provides. That's why a small, low-power chip dedicated to decoding video can easily handle a task that can strain a CPU. The downside is that they're only good for the task they're made for. It's only recently that devices like field-programmable gate arrays (FPGAs) have provided a best-of-both-worlds option. FPGAs can be reconfigured on the fly to perform a single task. But a competing technology is in the works that may be able to compete with FPGAs, and it's based on chaos theory.

Those who think of chaos as completely unpredictable are likely to be wondering how unpredictable behavior can be used to perform logic operations. But chaos theory isn't concerned with unpredictability; instead, it focuses on what are called nonlinear functions, ones where the ultimate output is very sensitive to the initial conditions. When you can control the initial conditions, you can still predict the output.

That ability is at the heart of a chaotic processor. The authors of a recent paper in Chaos describe what they call "chaogates," which use simple, nonlinear functions to perform logic operations. The basic idea is that, ultimately, you want a logical output, a binary 1 or 0. It's possible to convert the output of even a complex function into that sort of binary distinction using a strategically placed less than or equal to (<=) operation. If this sort of function is hardwired into the chip, then it's simply a matter of knowing how to select your inputs so that you get the operation of your choice.

"The patterns of chaos are used to encode and to manipulate inputs so as to produce a desired output," the authors state. "This is accomplished by selecting out desired patterns from the infinite variety offered by a chaotic system. A subset of these patterns is then used to map the system inputs (or initial conditions) to the desired outputs."

Encoding your actual inputs to match those required by a chaogate may seem like a backwards way to do things, but it does allow the same piece of silicon to be repurposed to perform any logical function. This is an advantage over FPGAs, since each of their gates operates by switching among a set of hardware implementations. In theory, a single chaogate can be used to do just about anything simply by switching the input encoder.

Another feature of nonlinear systems can also save a bit of silicon: time dependence. The output of nonlinear equations can evolve over time when the previous results are reused as input. So, if a complex chain of logical operations are needed, it is possible to simply keep running the same chaogate, but keep track of the number of iterations it has done. After a known number of runs, the function can output the result appropriate for the entire series of operations. In essence, you can trade clock cycles for silicon.

All of this sounds pretty good on paper (and it's meant to; the authors have a startup dedicated to building these chips), but how well does it work in practice? The authors have working silicon, albeit at 30MHz and a micrometer process. A single chaogate appears to be over four times larger than a standard NAND gate implemented on the same process, so we're not at the point where this is saving any space on the chip. The authors claim that there are reasons to think the chaogate can be shrunk, but they haven't yet demonstrated that.

Still, the chaogates lived up to their billing in some ways. In less than a clock cycle, an arithmetic unit could switch from operating as a multiplier to performing add/accumulate operations. In the same way, they got a peripheral interface to switch to operating as a control bus implementation, again in under a single clock cycle.

The biggest downside that the authors point out, however, isn't hardware based. It's compiler technology. Reprogramming a chaogate requires a hardware description language that is unlike anything currently in existence.

Still, there are a number of reasons it may be worth pursuing. The authors point out that some of the ideas for a replacement for silicon gates, including optical and electron tunneling systems, already are nonlinear. In other words, advanced technology may end up using a potential chaogate anyway, so it would be good to be in a position to take advantage of that.

Source: ars technica

Tags: CPUs

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